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13 février 2018

Hardware architecture design for next-generation Tb/s turbo codes

Catégorie : Post-doctorant

Duration: 12 months, to start as soon as possible from March 15th, 2018

Workplace: IMT Atlantique/Electronics Department, Lab-STICC laboratory/IAS Team, Technopole Brest Iroise – CS 83818 – 29238 Brest – France


Due to the high expertise of IMT Atlantique in designing turbo and related codes, our research team is in charge of the design of turbo-like codes for EPIC. The research activity of the Electronics department of IMT Atlantique is mainly dedicated to the joint design of algorithms and hardware architectures (Algorithm-Silicon Interaction) for digital communication applications. Since the invention of turbo codes in the early nineties, this research team has been internationally recognized for its expertise in channel coding and iterative processing and has designed turbo codes for several 3GPP and DVB standards.The scientific work of the team has already been awarded several national and international prizes, including the 2003 IEEE Richard W. Hamming Medal, the 2005 Marconi Prize or the 2009 IEEE/SEE Glavieux Prize.

The team has beenrecently involved in the design of new FEC codes (turbo and turbo-like codes) for 5G within the H2020 project FANTASTIC-5G (Flexible Air iNTerfAce for Scalable service delivery wiThin wIreless Communication networks of the 5th Generation) and is currently participating in the 5G standardization in 3GPP RAN1 NR (New Radio) activities.




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